| nRF5 SDK v12.0.0 |

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nrf_pwm_sequence_t Struct Reference
PWM HAL

Structure for defining a sequence of PWM duty cycles. More...

`#include <nrf_pwm.h>`

## Data Fields
nrf_pwm_values_t | values
| Pointer to an array with duty cycle values. This array must be in Data RAM. More...
uint16_t | length
| Number of 16-bit values in the array pointed by `values`.
uint32_t | repeats
| Number of times that each duty cycle should be repeated (after being played once). Ignored in NRF_PWM_STEP_TRIGGERED mode.
uint32_t | end_delay
| Additional time (in PWM periods) that the last duty cycle is to be kept after the sequence is played. Ignored in NRF_PWM_STEP_TRIGGERED mode.

## Detailed Description

Structure for defining a sequence of PWM duty cycles.

When the sequence is set (by a call to nrf_pwm_sequence_set), the provided duty cycle values are not copied. The `values` pointer is stored in the peripheral's internal register, and the values are loaded from RAM during the sequence playback. Therefore, you must ensure that the values do not change before and during the sequence playback (for example, the values cannot be placed in a local variable that is allocated on stack). If the sequence is played in a loop and the values should be updated before the next iteration, it is safe to modify them when the corresponding event signaling the end of sequence occurs (NRF_PWM_EVENT_SEQEND0 or NRF_PWM_EVENT_SEQEND1, respectively).

Note
  The `repeats` and `end_delay` values (which are written to the SEQ[n].REFRESH and SEQ[n].ENDDELAY registers in the peripheral, respectively) are ignored at the end of a complex sequence playback, indicated by the LOOPSDONE event. See the Product Specification for more information.

## Field Documentation

nrf_pwm_values_t nrf_pwm_sequence_t::values

Pointer to an array with duty cycle values. This array must be in Data RAM.

This field is defined as an union of pointers to provide a convenient way to define duty cycle values in various loading modes (see nrf_pwm_dec_load_t). In each value, the most significant bit (15) determines the polarity of the output and the others (14-0) compose the 15-bit value to be compared with the pulse generator counter.