/**
 * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA
 *
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without modification,
 * are permitted provided that the following conditions are met:
 *
 * 1. Redistributions of source code must retain the above copyright notice, this
 *    list of conditions and the following disclaimer.
 *
 * 2. Redistributions in binary form, except as embedded into a Nordic
 *    Semiconductor ASA integrated circuit in a product or a software update for
 *    such product, must reproduce the above copyright notice, this list of
 *    conditions and the following disclaimer in the documentation and/or other
 *    materials provided with the distribution.
 *
 * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
 *    contributors may be used to endorse or promote products derived from this
 *    software without specific prior written permission.
 *
 * 4. This software, with or without modification, must only be used with a
 *    Nordic Semiconductor ASA integrated circuit.
 *
 * 5. Any software provided in binary form under this license must not be reverse
 *    engineered, decompiled, modified and/or disassembled.
 *
 * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
 * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
 * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
 * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 */
#include "QSPI_driver.h" 
#include "my_block_dev_qspi.h"
/**@file
 *
 * @ingroup nrf_block_dev_qspi
 * @{
 *
 * @brief This module implements block device API. It should be used as a reference block device.
 */
#define MY_BD_PAGE_PROGRAM_SIZE 256    /**< Page program size (minimum block size)*/

/**
 * @brief Block to erase unit translation
 *
 * @param blk_id    Block index
 * @param blk_size  Block size
 * */
#define MY_BD_BLOCK_TO_ERASEUNIT(blk_id, blk_size)   \
    ((blk_id) * (blk_size)) / (MY_BLOCK_DEV_QSPI_ERASE_UNIT_SIZE)

/**
 * @brief Blocks per erase unit
 *
 * @param blk_size  Block size
 * */
#define MY_BD_BLOCKS_PER_ERASEUNIT(blk_size)         \
    (MY_BLOCK_DEV_QSPI_ERASE_UNIT_SIZE / (blk_size))


/**
 * @brief Active QSPI block device handle. Only one instance.
 * */

/*************************************************************************   
**	function name:	my_block_dev_qspi_init 
**	description:	                  
**	input para:		 
**                  	
**	return:			                                       
**************************************************************************/
static ret_code_t my_block_dev_qspi_init(nrf_block_dev_t const *  p_blk_dev,
                                         nrf_block_dev_ev_handler ev_handler,
                                         void const * p_context)
{
    ASSERT(p_blk_dev);
    my_block_dev_qspi_t const *  p_qspi_dev =
                                  CONTAINER_OF(p_blk_dev, my_block_dev_qspi_t, block_dev);
    my_block_dev_qspi_work_t *   p_work = p_qspi_dev->p_work;


    
    if (p_qspi_dev->qspi_bdev_config.block_size % MY_BD_PAGE_PROGRAM_SIZE)
    {
        /*Unsupported block size*/
        return NRF_ERROR_NOT_SUPPORTED;
    }

    if (MY_BLOCK_DEV_QSPI_ERASE_UNIT_SIZE % p_qspi_dev->qspi_bdev_config.block_size)
    {
        /*Unsupported block size*/
        return NRF_ERROR_NOT_SUPPORTED;
    }
    /* Calculate block device geometry.... */   
    uint32_t blk_size  = p_qspi_dev->qspi_bdev_config.block_size;
    uint32_t blk_count = FAT_END_ADDR / p_qspi_dev->qspi_bdev_config.block_size;

    if (!blk_count || (blk_count % MY_BD_BLOCKS_PER_ERASEUNIT(blk_size)))
    {
        return NRF_ERROR_NOT_SUPPORTED;
    }

    p_work->geometry.blk_size  = blk_size;
    p_work->geometry.blk_count = blk_count;
    p_work->p_context          = p_context;
    p_work->ev_handler         = ev_handler;

    if (p_work->ev_handler)
    {
        /*Asynchronous operation (simulation)*/
        const nrf_block_dev_event_t ev = {
                NRF_BLOCK_DEV_EVT_INIT,
                NRF_BLOCK_DEV_RESULT_SUCCESS,
                NULL,
                p_work->p_context
        };

        p_work->ev_handler(p_blk_dev, &ev);
    }

    return NRF_SUCCESS;
}
/*************************************************************************   
**	function name:	block_dev_qspi_uninit 
**	description:	                  
**	input para:		 
**                  	
**	return:			                                       
**************************************************************************/
static ret_code_t my_block_dev_qspi_uninit(nrf_block_dev_t const * p_blk_dev)
{
    ASSERT(p_blk_dev);
    my_block_dev_qspi_t const * p_qspi_dev =
                                 CONTAINER_OF(p_blk_dev, my_block_dev_qspi_t, block_dev);
    my_block_dev_qspi_work_t * p_work = p_qspi_dev->p_work;


    if (p_work->ev_handler)
    {
        /*Asynchronous operation*/
        const nrf_block_dev_event_t ev = {
                NRF_BLOCK_DEV_EVT_UNINIT,
                NRF_BLOCK_DEV_RESULT_SUCCESS,
                NULL,
                p_work->p_context
        };

        p_work->ev_handler(p_blk_dev, &ev);
    }


//    nrf_drv_qspi_uninit();

    memset(p_work, 0, sizeof(my_block_dev_qspi_work_t));
    return NRF_SUCCESS;
}

/*************************************************************************   
**	function name:	block_dev_qspi_read_req 
**	description:	                  
**	input para:		 
**                  	
**	return:			                                       
**************************************************************************/
static ret_code_t my_block_dev_qspi_read_req(nrf_block_dev_t const * p_blk_dev,
                                             nrf_block_req_t const * p_blk)
{
    ASSERT(p_blk_dev);
    ASSERT(p_blk);
    my_block_dev_qspi_t const * p_qspi_dev =
                                 CONTAINER_OF(p_blk_dev, my_block_dev_qspi_t, block_dev);
    my_block_dev_qspi_work_t *  p_work = p_qspi_dev->p_work;

    ret_code_t ret = NRF_SUCCESS;

    if ((p_blk->blk_id + p_blk->blk_count) > p_work->geometry.blk_count)
    {
       return NRF_ERROR_INVALID_ADDR;
    }

    uint32_t read_size = p_blk->blk_count * p_work->geometry.blk_size;
    uint32_t read_addr = p_blk->blk_id * p_work->geometry.blk_size;
    
    QSPI_flash_read(p_blk->p_buff, read_size, read_addr);

    if (p_work->ev_handler)
    {
        const nrf_block_dev_event_t ev = {
                NRF_BLOCK_DEV_EVT_BLK_READ_DONE,
                NRF_BLOCK_DEV_RESULT_SUCCESS,
                NULL,
                p_work->p_context
        };

        p_work->ev_handler(&p_qspi_dev->block_dev, &ev);
    }

    return ret;
}
/*************************************************************************   
**	function name:	block_dev_qspi_read_req 
**	description:	                  
**	input para:		 
**                  	
**	return:			                                       
**************************************************************************/
static ret_code_t my_block_dev_qspi_write_req(nrf_block_dev_t const * p_blk_dev,
                                              nrf_block_req_t const * p_blk)
{
    ASSERT(p_blk_dev);
    ASSERT(p_blk);
    my_block_dev_qspi_t const * p_qspi_dev =
                                 CONTAINER_OF(p_blk_dev, my_block_dev_qspi_t, block_dev);
    my_block_dev_qspi_work_t *  p_work = p_qspi_dev->p_work;

    ret_code_t ret = NRF_SUCCESS;

    if ((p_blk->blk_id + p_blk->blk_count) > p_work->geometry.blk_count)
    {
        return NRF_ERROR_INVALID_ADDR;
    }

    uint32_t write_size = p_blk->blk_count * p_work->geometry.blk_size;
    uint32_t write_addr = p_blk->blk_id * p_work->geometry.blk_size;
    
    QSPI_flash_write(p_blk->p_buff, write_size, write_addr);

    if (p_work->ev_handler)
    {
        const nrf_block_dev_event_t ev = {
                NRF_BLOCK_DEV_EVT_BLK_WRITE_DONE,
                NRF_BLOCK_DEV_RESULT_SUCCESS,
                NULL,
                p_work->p_context
        };

        p_work->ev_handler(&p_qspi_dev->block_dev, &ev);
    }

    return ret;
}

static ret_code_t my_block_dev_qspi_ioctl(nrf_block_dev_t const * p_blk_dev,
                                          nrf_block_dev_ioctl_req_t req,
                                          void * p_data)
{
    ASSERT(p_blk_dev);
    my_block_dev_qspi_t const * p_qspi_dev =
                                 CONTAINER_OF(p_blk_dev, my_block_dev_qspi_t, block_dev);
    my_block_dev_qspi_work_t *  p_work = p_qspi_dev->p_work;

    switch (req)
    {
        case NRF_BLOCK_DEV_IOCTL_REQ_CACHE_FLUSH:
        {
            bool * p_flushing = p_data;
            
            *p_flushing = false;
            return NRF_SUCCESS;
        }
        case NRF_BLOCK_DEV_IOCTL_REQ_INFO_STRINGS:
        {
            if (p_data == NULL)
            {
                return NRF_ERROR_INVALID_PARAM;
            }

            nrf_block_dev_info_strings_t const * * pp_strings = p_data;
            *pp_strings = &p_qspi_dev->info_strings;
            return NRF_SUCCESS;
        }
        default:
            break;
    }

    return NRF_ERROR_NOT_SUPPORTED;
}

static nrf_block_dev_geometry_t const * my_block_dev_qspi_geometry(nrf_block_dev_t const * p_blk_dev)
{
    ASSERT(p_blk_dev);
    my_block_dev_qspi_t const * p_qspi_dev =
                                 CONTAINER_OF(p_blk_dev, my_block_dev_qspi_t, block_dev);
    my_block_dev_qspi_work_t const * p_work = p_qspi_dev->p_work;

    return &p_work->geometry;
}

const nrf_block_dev_ops_t my_block_device_qspi_ops = {
        .init      = my_block_dev_qspi_init,
        .uninit    = my_block_dev_qspi_uninit,
        .read_req  = my_block_dev_qspi_read_req,
        .write_req = my_block_dev_qspi_write_req,
        .ioctl     = my_block_dev_qspi_ioctl,
        .geometry  = my_block_dev_qspi_geometry,
};

/** @} */

