Minimum Pulse-Width Resolution for nRF52840 PWM Module

user65515,

OK - so 125 nS then,

Thanks,
John

Welcome, but 125nSec period or 62.5nSec pulsewidth :-)

@hmolesworth,

Sure - assuming a 50% PDC (positive duty cycle) if the GPIO hardware allows this and indeed the minimum period is defined as 1 / (base clock) - still would be nice to see this called out in detail in the specs.

Thanks,
John