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<?xml-stylesheet type="text/xsl" href="https://test-devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>How to detect GPIO interrupt source from deep sleep</title><link>https://test-devzone.nordicsemi.com/f/nordic-q-a/87925/how-to-detect-gpio-interrupt-source-from-deep-sleep</link><description>Hi, 
 in my application I have setup the nRF52 to wake-up from deep sleep if a low value is detected on either of two GPIOs (4 and 5). What I&amp;#39;m trying to achieve, is to be able to detect upon wakeup which of the two has caused the interrupt. The issue</description><dc:language>en-US</dc:language><generator>Telligent Community 13 Non-Production</generator><lastBuildDate>Wed, 18 May 2022 05:58:14 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://test-devzone.nordicsemi.com/f/nordic-q-a/87925/how-to-detect-gpio-interrupt-source-from-deep-sleep" /><item><title>RE: How to detect GPIO interrupt source from deep sleep</title><link>https://test-devzone.nordicsemi.com/thread/368183?ContentTypeID=1</link><pubDate>Wed, 18 May 2022 05:58:14 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:a1193284-bc92-4945-87f1-640ab50ddd39</guid><dc:creator>user75734</dc:creator><description>&lt;p&gt;Hi&lt;/p&gt;
&lt;p&gt;I would suggest checking out&lt;a href="https://test-devzone.nordicsemi.com/f/nordic-q-a/42399/understanding-how-the-detect-signal-works-and-how-to-clear-it/165223#165223"&gt; this thread&lt;/a&gt; where my colleague Håkon discuss and explains how to use the DETECT signal and LATCH register. There are no example projects specifically showcasing the LATCH registers features, but any that use the &lt;strong&gt;nrfx_gpiote&lt;/strong&gt; driver should be rather easy to implement.&lt;/p&gt;
&lt;p&gt;Best regards,&lt;/p&gt;
&lt;p&gt;Simon&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: How to detect GPIO interrupt source from deep sleep</title><link>https://test-devzone.nordicsemi.com/thread/367917?ContentTypeID=1</link><pubDate>Sat, 14 May 2022 18:18:15 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:eec553b3-d6e2-47f3-9140-15e0b6ccb2d2</guid><dc:creator>user116143</dc:creator><description>&lt;p&gt;Hm, that&amp;#39;s a good idea! &lt;span class="emoticon" data-url="https://test-devzone.nordicsemi.com/cfs-file/__key/system/emoji/1f44d.svg" title="Thumbsup"&gt;&amp;#x1f44d;&lt;/span&gt;&amp;nbsp;I&amp;#39;m using nRF52832, so it seams that LATCH is supported. Do you know if there is any application example that uses this feature?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: How to detect GPIO interrupt source from deep sleep</title><link>https://test-devzone.nordicsemi.com/thread/367911?ContentTypeID=1</link><pubDate>Sat, 14 May 2022 08:57:08 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:ecb8e0c7-59d9-478a-a95f-2138bb4497f5</guid><dc:creator>user18935</dc:creator><description>&lt;p&gt;Check if your chip supports the LATCH register in GPIO. The triggered pin should read a 1 in that register.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>