Optimizing Power on nRF52 Designs

RE: Optimizing Power on nRF52 Designs

user79834 — Mon, 21 Mar 2022 03:27:04 GMT

Hi, about item 8.b, it said the lowest power is 1.5uA for nRF52840 during the BLE connection event, it means sd_app_evt_wait works without RAM retention, right?

RE: Optimizing Power on nRF52 Designs

user80355 — Fri, 24 Jul 2020 20:05:03 GMT

You mention "that single-pin GPIOTE interrupts may use more power than Port GPIOTE interrupts depending on the scenario."
Do you have any idea of the order of magnitude difference for these?
I'm seeing an extra ~10uA when I enable an interrupt on a pin and am trying to figure out if this is expected or not.

RE: Optimizing Power on nRF52 Designs

user67703 — Thu, 07 Feb 2019 21:56:52 GMT

Thanks, great post. Is there any way to disable SWD or DIF mode in software if the option of power cycling is unavailable (no access to device). ?

RE: Optimizing Power on nRF52 Designs

user66633 — Thu, 28 Jun 2018 15:30:56 GMT

thanks!Simple and useful.

RE: Optimizing Power on nRF52 Designs

user66876 — Wed, 27 Jun 2018 17:39:51 GMT

Thank you, this is a good article. I ran into these requirements few months ago. Actually the main blocker I find out preventing me to go to SYSTEM_OFF mode is the easyDMA. If a peripheral is using the DMA you cannot go to System OFF. In my case it was related to the PWM.