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nRF52840 ESD failure 4kV body model

user88066

Dear All,

We are developing a device based around nRF52840 on a rigid-flex custom PCB that is mounted inside an anodized aluminum cube with one face covered with plastic. 

During certification we failed the 4 kV body model ESD test. The ESD pulse was shot to the external aluminum edge of the cube. After ESD pulse, the nRF52840 reset and permanent damage was done to some GPIO pins. The damage manifests as low resistance to ground (63 to 150 ohms) on pins P0.26, P0.29, P0.06 configured as outputs, and P0.31 configured as analog inputs. The internal circuitry (output drivers, ADC) of damaged pins is still operational, i.e., voltage level changes if 1 or 0 is written to output, and forced voltage can be read on ADC albeit not correct one. Outputs are driving MOS-FET that turn on or off some IR LEDs, while the failed input reads a voltage on reverse biased photodiode. There are other outputs and inputs with similar external components and similar topography that have not failed. We also can't find any specific common point to the damaged pins. There is also no additional ESD protection on the PCB, with exception of using the reference PCB design around the nRF52840.

Has anyone experienced similar issues, or has any idea what (more exactly) went wrong in our case? Our mitigation proposal is to add 1 nF capacitors towards GND on the affected GPIO lines and other GPIO lines that could potentially also be affected.

Any help will be greatly appreciated.

Best regards,
Matevz

Parents
  • +1

    Tracking ESD events where they enter the design and how they spread on the PCB can be challenging. Decoupling and protection of pins that are exposed are needed. But also consider improving the HV insulation of the PCB. Maybe place a plastic sheet between the PCB and the housing. 

    The ESD event will partly melt the internal structure of the pad driver. You can see different effects of this, but usually a lower than normal resistance to ground.

Reply
  • +1

    Tracking ESD events where they enter the design and how they spread on the PCB can be challenging. Decoupling and protection of pins that are exposed are needed. But also consider improving the HV insulation of the PCB. Maybe place a plastic sheet between the PCB and the housing. 

    The ESD event will partly melt the internal structure of the pad driver. You can see different effects of this, but usually a lower than normal resistance to ground.

Children
  • +1 in reply to ketiljo

    Dear ketilja,

    Thank you for reply, explanation and suggestions. You were right. ESD events slowly melted the pad drivers. We have used ESD protection diodes to protect GPIO lines and serial resistances do further decouple them from nRF. We are now ESD compliant!

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