In SDK v17.1.0, In QSPI init, I see all the pins are configured as Input pins during nrfx_qspi_init. Isn't this wrong? Shouldn't we set the SCLK, CSN, MOSI pins as O/P pins? and why Input buffer disconnected for input pins?
/**
* @brief Macro for initializing a QSPI pin.
*
* QSPI peripheral expects high drive pin strength.
*/
#define QSPI_PIN_INIT(_pin) nrf_gpio_cfg((_pin), \
NRF_GPIO_PIN_DIR_INPUT, \
NRF_GPIO_PIN_INPUT_DISCONNECT, \
NRF_GPIO_PIN_NOPULL, \
NRF_GPIO_PIN_H0H1, \
NRF_GPIO_PIN_NOSENSE)
static bool qspi_pins_configure(nrf_qspi_pins_t const * p_config)
{
// Check if the user set meaningful values to struct fields. If not, return false.
if ((p_config->sck_pin == NRF_QSPI_PIN_NOT_CONNECTED) ||
(p_config->csn_pin == NRF_QSPI_PIN_NOT_CONNECTED) ||
(p_config->io0_pin == NRF_QSPI_PIN_NOT_CONNECTED) ||
(p_config->io1_pin == NRF_QSPI_PIN_NOT_CONNECTED))
{
return false;
}
QSPI_PIN_INIT(p_config->sck_pin);
QSPI_PIN_INIT(p_config->csn_pin);
QSPI_PIN_INIT(p_config->io0_pin);
QSPI_PIN_INIT(p_config->io1_pin);
if (p_config->io2_pin != NRF_QSPI_PIN_NOT_CONNECTED)
{
QSPI_PIN_INIT(p_config->io2_pin);
}
if (p_config->io3_pin != NRF_QSPI_PIN_NOT_CONNECTED)
{
QSPI_PIN_INIT(p_config->io3_pin);
}
nrf_qspi_pins_set(NRF_QSPI, p_config);
return true;
}
