The nrf52 is waking from a sd_power_system_off() and resets. The reset reason register indicates it was from a DETECT from GPIO, yet the LATCH register is 0 and all the sense bits of all io pins are disabled.
hellllpppp
Rich
The nrf52 is waking from a sd_power_system_off() and resets. The reset reason register indicates it was from a DETECT from GPIO, yet the LATCH register is 0 and all the sense bits of all io pins are disabled.
hellllpppp
Rich
Found problem. Part of PAN 11 (see Errata)
Hi Richard,
I'm seeing something vaguely similar in my code. Any change you could point me in the direction of the information you refer to above?
Did you ever get a work-around for this?
Cheers,
Mike
Hi Richard,
I'm seeing something vaguely similar in my code. Any change you could point me in the direction of the information you refer to above?
Did you ever get a work-around for this?
Cheers,
Mike
I think PAN 11 refers to this:
But that's really old, and fixed ages ago before even the first production version was released.
Thanks. OK, that's not what's causing my issue.
I'm having problems where, if I get multiple GPIO triggers in quick succession (within a 100msec for example) whilst the device is coming out of System Off, the LATCH register is getting cleared, and so I can't determine which GPIO caused the exit to occur.
The LATCH register only has valid info if I get one GPIO trigger, and my code has time to come out of System Off, do its thing, then go back into System Off. If it gets a second trigger on a valid GPIO during the the time between the first, and when it goes back into System Off, the LATCH register gets reset.
Can't for the life of me work out why its happening :-(
Hi Mike,
This is a 5 years old case. Please create a new case for your issue. Please also give more information about your device in the case.
Hi Hung,
I've got an ongoing case trying to get to the bottom of my problem:
https://devzone.nordicsemi.com/f/nordic-q-a/88311/multiple-gpio-interrupts-from-system_soft_off
Regards,
Mike