how to set the High-drive QSPI?

NRF_GPIO_PIN_H0H1

        nrf_gpio_cfg(mosi_pin,
                     NRF_GPIO_PIN_DIR_OUTPUT,
                     NRF_GPIO_PIN_INPUT_CONNECT,
                     NRF_GPIO_PIN_NOPULL,
                     NRF_GPIO_PIN_H0H1,
                     NRF_GPIO_PIN_NOSENSE);

Parents

0 user75734 over 4 years ago

Hi

What SDK and SDK version are you using for development? You can see how to set the drive strength for any GPIO in this case where my colleague Amanda explains how to.

Best regards,

Simon
Cancel
Vote Up 0 Vote Down

Sign in to reply

Verify Answer

Cancel

0 user89602 over 4 years ago in reply to user75734

SDK15.2

1.init qspi

2.set all pin NRF_GPIO_PIN_H0H1

 nrf_drv_qspi_config_t config;
        config.pins.csn_pin = FLASH_QSPI_CSN_NUMBER;
        config.pins.sck_pin = FLASH_QSPI_SCK_NUMBER;
        config.pins.io0_pin = FLASH_QSPI_IO0_NUMBER;
        config.pins.io1_pin = FLASH_QSPI_IO1_NUMBER;
        config.pins.io2_pin = FLASH_QSPI_IO2_NUMBER;
        config.pins.io3_pin = FLASH_QSPI_IO3_NUMBER;


        config.prot_if.readoc = NRF_QSPI_READOC_READ4O;
        config.prot_if.writeoc = NRF_QSPI_WRITEOC_PP4O;
        config.prot_if.addrmode = NRF_QSPI_ADDRMODE_24BIT;
        config.prot_if.dpmconfig = 0;
        config.phy_if.sck_delay = 0x01;
        config.phy_if.dpmen = 0;
        config.phy_if.spi_mode = NRF_QSPI_MODE_0;
        config.phy_if.sck_freq = FLASH_QSPI_HZ;
        config.irq_priority = 0x06;
        config.xip_offset = 0;
        int err_code = nrf_drv_qspi_init(&config, NULL, NULL);
        APP_ERROR_CHECK(err_code);




        nrf_gpio_cfg(FLASH_QSPI_CSN_NUMBER,
                     NRF_GPIO_PIN_DIR_OUTPUT,
                     NRF_GPIO_PIN_INPUT_CONNECT,
                     NRF_GPIO_PIN_NOPULL,
                     NRF_GPIO_PIN_H0H1,
                     NRF_GPIO_PIN_NOSENSE);

        nrf_gpio_cfg(FLASH_QSPI_SCK_NUMBER,
                     NRF_GPIO_PIN_DIR_OUTPUT,
                     NRF_GPIO_PIN_INPUT_CONNECT,
                     NRF_GPIO_PIN_NOPULL,
                     NRF_GPIO_PIN_H0H1,
                     NRF_GPIO_PIN_NOSENSE);

        nrf_gpio_cfg(FLASH_QSPI_IO1_NUMBER,
                     NRF_GPIO_PIN_DIR_OUTPUT,
                     NRF_GPIO_PIN_INPUT_CONNECT,
                     NRF_GPIO_PIN_NOPULL,
                     NRF_GPIO_PIN_H0H1,
                     NRF_GPIO_PIN_NOSENSE);

        nrf_gpio_cfg(FLASH_QSPI_IO2_NUMBER,
                     NRF_GPIO_PIN_DIR_OUTPUT,
                     NRF_GPIO_PIN_INPUT_CONNECT,
                     NRF_GPIO_PIN_NOPULL,
                     NRF_GPIO_PIN_H0H1,
                     NRF_GPIO_PIN_NOSENSE);

        nrf_gpio_cfg(FLASH_QSPI_IO3_NUMBER,
                     NRF_GPIO_PIN_DIR_OUTPUT,
                     NRF_GPIO_PIN_INPUT_CONNECT,
                     NRF_GPIO_PIN_NOPULL,
                     NRF_GPIO_PIN_H0H1,
                     NRF_GPIO_PIN_NOSENSE);

Reply

0 user89602 over 4 years ago in reply to user75734

SDK15.2

1.init qspi

2.set all pin NRF_GPIO_PIN_H0H1

 nrf_drv_qspi_config_t config;
        config.pins.csn_pin = FLASH_QSPI_CSN_NUMBER;
        config.pins.sck_pin = FLASH_QSPI_SCK_NUMBER;
        config.pins.io0_pin = FLASH_QSPI_IO0_NUMBER;
        config.pins.io1_pin = FLASH_QSPI_IO1_NUMBER;
        config.pins.io2_pin = FLASH_QSPI_IO2_NUMBER;
        config.pins.io3_pin = FLASH_QSPI_IO3_NUMBER;


        config.prot_if.readoc = NRF_QSPI_READOC_READ4O;
        config.prot_if.writeoc = NRF_QSPI_WRITEOC_PP4O;
        config.prot_if.addrmode = NRF_QSPI_ADDRMODE_24BIT;
        config.prot_if.dpmconfig = 0;
        config.phy_if.sck_delay = 0x01;
        config.phy_if.dpmen = 0;
        config.phy_if.spi_mode = NRF_QSPI_MODE_0;
        config.phy_if.sck_freq = FLASH_QSPI_HZ;
        config.irq_priority = 0x06;
        config.xip_offset = 0;
        int err_code = nrf_drv_qspi_init(&config, NULL, NULL);
        APP_ERROR_CHECK(err_code);




        nrf_gpio_cfg(FLASH_QSPI_CSN_NUMBER,
                     NRF_GPIO_PIN_DIR_OUTPUT,
                     NRF_GPIO_PIN_INPUT_CONNECT,
                     NRF_GPIO_PIN_NOPULL,
                     NRF_GPIO_PIN_H0H1,
                     NRF_GPIO_PIN_NOSENSE);

        nrf_gpio_cfg(FLASH_QSPI_SCK_NUMBER,
                     NRF_GPIO_PIN_DIR_OUTPUT,
                     NRF_GPIO_PIN_INPUT_CONNECT,
                     NRF_GPIO_PIN_NOPULL,
                     NRF_GPIO_PIN_H0H1,
                     NRF_GPIO_PIN_NOSENSE);

        nrf_gpio_cfg(FLASH_QSPI_IO1_NUMBER,
                     NRF_GPIO_PIN_DIR_OUTPUT,
                     NRF_GPIO_PIN_INPUT_CONNECT,
                     NRF_GPIO_PIN_NOPULL,
                     NRF_GPIO_PIN_H0H1,
                     NRF_GPIO_PIN_NOSENSE);

        nrf_gpio_cfg(FLASH_QSPI_IO2_NUMBER,
                     NRF_GPIO_PIN_DIR_OUTPUT,
                     NRF_GPIO_PIN_INPUT_CONNECT,
                     NRF_GPIO_PIN_NOPULL,
                     NRF_GPIO_PIN_H0H1,
                     NRF_GPIO_PIN_NOSENSE);

        nrf_gpio_cfg(FLASH_QSPI_IO3_NUMBER,
                     NRF_GPIO_PIN_DIR_OUTPUT,
                     NRF_GPIO_PIN_INPUT_CONNECT,
                     NRF_GPIO_PIN_NOPULL,
                     NRF_GPIO_PIN_H0H1,
                     NRF_GPIO_PIN_NOSENSE);

Children

No Data