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ZEPHYR spi asynchronus api transfer with asymmetric buffers error

Hi,

Zephyr 3.0 , nrf5340  ncs 1.9.1 

i can successfully sent data with

this function ; 
int adxl362ext_get_fifo_data(const struct device *dev,uint8_t *read_buf, uint16_t count,struct k_poll_signal *signal_)
{
	const struct adxl362ext_config *cfg = dev->config;
	int err;
	uint8_t access[1] = { ADXL362EXT_READ_FIFO};
	const struct spi_buf buf[2] = {
		{
			.buf = access,
			.len = 1
		},
		{
			.buf = read_buf,
			.len = count
		}
	};
	struct spi_buf_set tx = {
		.buffers = buf,
		.count = 1
	};

	const struct spi_buf_set rx = {
		.buffers = buf,
		.count = 2
	};
	err = spi_transceive_dt(&cfg->bus,&tx, &rx);
	//err = spi_transceive_async_dt(&cfg->bus,&tx, &rx,signal_);
	return err;
}
So it sends 2 transactions without changing cs state.
1byte tx+rx  , and remaining rx bytes at the second transaction.. all works as expected.
but if i try async transceive function with these the same buffers / buffersets , i got kpoll event signal result as  -5 error ...
update: i could get 0 (success) but again it only sends the first buffers in the buffer set . 
if count is 1 in the buffer set , it works, but if count is 2 only the first parts fires. 
this is the debugger watch after the first chunk transferred. so this is the second chunk and it says 0 for rx and tx buffers.
if i use synchronous spi these chunks points the initial buffer address...
static inline int spi_transceive_async_dt(const struct spi_dt_spec *spec,
				    const struct spi_buf_set *tx_bufs,
				    const struct spi_buf_set *rx_bufs,struct k_poll_signal *signal_)
{
	return spi_transceive_async(spec->bus, &spec->config, tx_bufs, rx_bufs,signal_);
}
i tested with symmetric buffers, and it worked! 
one more finding , may be this helps to find out the issue ; 
void spi_context_update_rx(struct spi_context *ctx, uint8_t dfs, uint32_t len)
{
#ifdef CONFIG_SPI_SLAVE
	if (spi_context_is_slave(ctx)) {
		ctx->recv_frames += len;
	}

#endif /* CONFIG_SPI_SLAVE */

	if (!ctx->rx_len) {
		return;
	}
if(len>100){
volatile int oo;
oo=0;
}
	if (len > ctx->rx_len) {
		LOG_ERR("Update exceeds current buffer");
		return;
	}

	ctx->rx_len -= len;
	if (!ctx->rx_len) {
		/* Current buffer is done. Get the next one to be processed. */
		++ctx->current_rx;
		--ctx->rx_count;
		ctx->rx_buf = (uint8_t *)
			spi_context_get_next_buf(&ctx->current_rx,
						 &ctx->rx_count,
						 &ctx->rx_len, dfs);
	} else if (ctx->rx_buf) {
		ctx->rx_buf += dfs * len;
	}

	LOG_DBG("rx buf/len %p/%zu", ctx->rx_buf, ctx->rx_len);
}
i have added this code to make a breakpoint for debugger in spi_context_update_rx(struct spi_context *ctx, uint8_t dfs, uint32_t len) function( as you can see above. line 13)
if(len>100){
volatile int oo;
oo=0;
}
I set my second buffer length as 256
	uint8_t access[1] = { ADXL362EXT_READ_FIFO};
	const struct spi_buf buf[2] = {
		{
			.buf = access,
			.len = 1
		},
		{
			.buf = read_buf,
			.len = 256
		}
	};
	struct spi_buf_set tx = {
		.buffers = buf,
		.count = 1
	};

	const struct spi_buf_set rx = {
		.buffers = buf,
		.count = 2
	};
	#if(CONFIG_SPI_ASYNC)
	err = spi_transceive_async_dt(&cfg->bus,&tx, &rx,signal_);
	#else
If i transfer these buffers with this function ;
spi_transceive_async_dt(&cfg->bus,&tx, &rx,signal_);
debugger will never stop at  len>100 condition;
if i transfer the same buffer with 
err = spi_transceive_dt(&cfg->bus,&tx, &rx);
debugger stops at break point and , i can see len is 256...
So i check the documentation i couldn't find any information about this issue.
How can we use asymmetric buffer/sets with asynchronous spi api ?
Thanks.
Parents
  • Hi Mehmet

    I don't seem to have any issues with this on my side. I can use the spi_transceive_async functions whether or not I have the same number of TX and RX buffers. 

    Please find my main.c file attached:

    Are you sure you are setting up the poll signal and event correctly?

    How are you polling the signal after starting the SPI transaction?

    Best regards
    Torbjørn

Reply
  • Hi Mehmet

    I don't seem to have any issues with this on my side. I can use the spi_transceive_async functions whether or not I have the same number of TX and RX buffers. 

    Please find my main.c file attached:

    Are you sure you are setting up the poll signal and event correctly?

    How are you polling the signal after starting the SPI transaction?

    Best regards
    Torbjørn

Children
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