If we are using the 5340 in high voltage mode (VDDH); what IO voltages are used for the debugger interface?
Looks like our HW designer has taken the lip voltage 4v3 to 3v5 to the reference interface segger Vtref.
Is this correct or shoul it be the I/O voltage of 1v8 (VDD).
I have seen I can talk to processor feeding my hw from 3v5, but fails to communicate over debugger iterface when powered from 4v2.
