This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

EMC and EMI concerns

I use an InsightSIP ISP1907-HT module, I have a 4 layer board to minimise cost. Signals on top and bottom with GND on inside.

I'm concerned that my design could fail emmissions tests because the vias on internal pads cause a hole in the GND plane below the processor.

There is also nowhere to place GND return vias beside the signal vias in this area.

The pads are connected to LEDs and I use PWM to vary the illumination. I have a small decoupling cap on each LED.

The ISP1907-HT datasheet does not offer any advice on board stackup or methods to connect these pads.

  • Hi Jason,

    as far as I can see they don't have any ground between the bads in their reference design/DK:


    Gerber files, DK

    So what you have done looks okay, based on their reference.

    Best regards,
    Kaja

  • thank you, I also looked at the same gerbers and I thought they have 2 or 3 GND pours under the pads.

    They also seem to use a via that does not go through the whole board. I'm not sure from these gerbers if its a 4 or 6 layer board. I never normally try to read gerber files so maybe I've made a mistake.

    I reached out to their contact page for support but I've not received a reply.

  • Looking at this again, it seems that the via-in-pad holes go all the way through the PCB, so maybe the module has a GND plane internally and all of this is fine already.

    Thanks for taking the time to help me, it's greatly appreciated.

    I will contact InsightSIP again to try to get a more certain answer. (just to be safe)

Related